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Micrel, Inc.
MICRF507
C5
L1
Modulation1 Modulation0
State
ANT (pin 5)
39pF
12nH
0
0
Closed loop VCO-modulation
0
1
Not in use
C4
12pF
C6
12pF
1
1
0
1
Modulation by A,M and N
Not in use
Table 18. Modulation Field
Figure 18. LC Filter
This filter is designed for the 490MHz band with 50?
terminations. Component values may have to be tuned to
compensate for layout parasitics.
Bits from the microcontroller to be transmitted enter at the
DATAIXO pin. See Table 19.
The modulation index ? must be a minimum of 2. It is
given by
Frequency Modulation
The MICRF507 supports two methods of FSK modulation,
selected with the Modulation field as shown in Table 18:
β = 2
f DEV
r b
VCO modulation (enabled when Modulation1 is bit set to
0) and divider modulation (Modulation1 bit set to 1). The
Modulation0 bit must always remain 0.
VCO Modulation
in which f DEV is the single-sided deviation and r b is the bit
rate. Another constraint on f DEV is
f DEV ≥ r b + f OFFSET
where f OFFSET is the total frequency offset between the
receiver and the transmitter:
The calculated f DEV should be used to calculate the needed
receiver bandwidth, see “Switched Capacitor Filter”
section.
Frequency Divider Modulation
Set Modulation[1:0] to
Means of modulation
Register fields to set
PLL bandwidth required
Bitstream constraints
Instantaneous frequency
waveform (spectrum)
00
VCO modulation using modulator
Refclk_K, Mod_clkS, Mod_I, Mod_A,
Mod_F
Lower than 1/10 of bit rate
DC balance required
Register fields affecting modulator
10
Divider modulation by switching between
A0/M0/NO and A1/M1/N1
A0, M0, N0, A1, M1, N1
Higher than 2x bit rate
None
PLL transient response
determined by
Table 19. Modulation Modes
October 2, 2013
29
Revision 2.2
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